By Ramesh K Choudhary, Jyotsna Kumar Mandal, Nitin Auluck, H A Nagarajaram
This booklet highlights a set of top quality peer-reviewed study papers offered on the 9th overseas convention on complex Computing & conversation applied sciences (ICACCT-2015) held at Asia Pacific Institute of data expertise, Panipat, India in the course of 27–29 November 2015. The ebook discusses a wide selection of commercial, engineering and medical purposes of the rising concepts. Researchers from academia and current their unique paintings and trade principles, info, ideas and purposes within the box of complex Computing and conversation Technology.
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Extra info for Advanced Computing and Communication Technologies: Proceedings of the 9th ICACCT, 2015
IEEE Trans. -II. Express Briefs 54(4), 318–322 (2007) 4. : A novel 7T SRAM cell design for reducing leakage power and improved stability. In: International Conference on Advanced Communication Control and Computing Technologies (ICACCCT-2014), pp. 56–59. Ramanathapuram (2014) 5. , Montoye, R. : Stable SRAM cell design for the 32 nm node and beyond. In: Symposium VLSI Technical Digest, pp. 292–293 (2005) 6. : Improved read and write margins using a novel 8T-SRAM cell. In: 22nd International Conference on Very Large Scale Integration (VLSI-SoC-2014), pp.
A-Math. Phys. Eng. Sci. 355, 43 (1997) 15. : J. Biomol. Struct. Dyn. 14, 747 (1997) 16. : J. Mol. Biol. 265, 603 (1997) Variation of Stacking Interactions Along with Twist Parameter… 15 17. : Proc. Natl. Acad. Sci. A. 95, 11163 (1998) 18. : J. Mol. Biol. 295, 85 (2000) 19. : Int. J. Quantum Chem. 108, 1173 (2008) 20. : S, Bhattacharyya D. BMC Res. Notes 7, 31 (2014) 21. : J. Comput. Aided Mol. Des. 28, 851 (2014) 22. : J. Phys. Chem. A 109, 2292 (2005) 23. : J. Phys. Chem. B 109, 11399 (2005) 24.
The data gets stored at Q. To read a value from an SRAM cell, both bit lines (BL and BLbar) are precharged high (VDD) and the word line is raised turning on the pass transistors (M5 and M6). The bit line relative to the cell node that contains 0 begins discharging. 671 ns respectively (Fig. 2, Table 1). SNM is deﬁned as the minimum noise voltage present at each of the cell storage nodes necessary to flip the state of the cell. SNM is a critical metric for SRAM stability (Fig. 3). Higher the noise margin greater the stability of the cell.